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Envis News Envis Exhibits Design-For-Power Technology at Japan’s EDSF SANTA CLARA, Calif. – December 10, 2008 – EDA technology leader Envis Corporation brings software and silicon technology for low-power electronics to the upcoming Electronic Design and Solution Fair (EDSF) in Yokohama, Japan, Jan. 22-23, 2009. Envis will welcome attendees to the Envis Emerging Companies booth, and deliver seminar presentations at the central stage. Designers in Japan have shown industry leadership in power management for ICs serving the consumer electronics, portable and communications markets. Envis low-power solutions dramatically reduce power for SoC designs, automatically. Envis will feature a portfolio of software and services for low-power design, including Chill, for intelligent, automated power reduction of 30-60%; and Kelvin, for automatic power pattern generation (APPG.) Attendees are invited to visit Envis at EDSF 2009 and see what's
new and green in power reduction for electronics. To schedule a special
meeting or low-power roadmap discussion with Envis during EDSF, please
email support@envis.com. For
more information on EDSF, see http://www.edsfair.com |